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IEEE SSCS DL Talk: Scaling up silicon photonic-based accelerators: Challenges and opportunities

June 28 @ 2:00 pm - 3:30 pm

Dr. Sudip Shekhar from the University of British Columbia will give an in-person talk, the abstract of which is below: Abstract: Digital accelerators in the latest generation of CMOS processes support multiply, and accumulate (MAC) operations at energy efficiencies spanning 10–100 fJ/Op. However, the operating speed for such MAC operations is often limited to a few hundreds of MHz. Optical or optoelectronic MAC operations on today’s silicon photonic IC platforms can be realized at a speed of tens of GHz, leading to much lower latency and higher throughput. In this talk, I will describe the integrated silicon photonic MAC circuits based on Mach–Zehnder and microring structures. I will present the bounds on energy efficiency and scaling limits for N × N MAC networks based on the optical and electrical link budget, as well as some packaging concerns related to the CMOS/photonic co-integration. I will also describe research directions that can overcome the current limitations. Speaker(s): Dr. Sudip Shekhar, Room: 1.162, Bldg: EV, 1515 Ste-Catherine West, Montreal, Quebec, Canada, H3G 1M8